master frequency meter

This article realizes the design of frequence measurement meter for generator unit by using Verilog HDL hardware description language with top to down method and software of QuartusⅡ,on the basis of complex programmable logic device ( FPGA ).

利用Verilog HDL硬件描述语言自顶向下的设计方法和Quartus Ⅱ软件,在复杂的可编程逻辑器件(FPGA,Field Pro-grammable Gate Array)中实现了发电机组频率测量计的设计。